This invention relates generally to sensing virtual ground flash memory arrays.
Flash memories with progressively reduced costs have been developed by increasing memory density and reducing die size. One way to reduce die size is to use a virtual ground technique. In a virtual ground technique, the contact is removed from the drain of the flash cell.
In one architecture for virtual ground memories, an upper portion of the architecture includes global decode and global select transistors and a lower portion contains flash cell blocks and local decode devices, local Y select transistors, and shunt devices. The shunt devices may have their gates connected to selection circuits. The local Y select transistors have their gates connected to a local bitline. The local Y select transistors are connected between global bitlines and local bitlines. The shunt devices are connected between two local bitlines. Current flow through a primary path includes the global select transistor, global bitline resistor, local Y select transistor, a shunt device, a local bitline RC, and a selected flash cell, as well as a local bitline RC, another local Y select transistor, the global bitline resistance, and the global Y select transistor. Current flow through each device in the path may cause voltage drops.